Beyond von Neumann: Why Your Next Wearable Might Think Like a Brain
Imagine a patch the size of a bandage worn on your wrist that monitors your heart’s electrical rhythm every second of every day, detects the subtle precursors of an arrhythmia before any symptom appears, and does all of this without ever sending data to a server, without generating enough heat to feel uncomfortable against skin, and without exhausting a coin-cell battery in less than a year. This is not science fiction; it is what neuromorphic computing is beginning to make possible, and to understand why it represents such a fundamental departure from everything we have built for the last eighty years, we need to go back to a design decision made in 1945 1.
The 80-Year-Old Bottleneck
Most computers today — your laptop, your phone, the server farms powering your favorite apps — are built on an architecture that has remained fundamentally unchanged since 1945: the von Neumann architecture, named after the mathematician John von Neumann, in which the processor (the part that thinks) and the memory (the part that remembers) are two separate units connected by a data bus. Every computation, however trivial, requires data to shuttle back and forth between these two units millions of times per second, a constraint known as the von Neumann bottleneck, and it carries a costly consequence: that relentless data transfer is responsible for a staggering proportion of a chip’s total energy consumption 2. For spreadsheets and video streaming, this cost is tolerable. For always-on sensing — the kind required by a wearable that must listen, watch, and respond to the world every hour of every day — it is prohibitive, draining a battery in hours and generating more heat than the human body can comfortably accommodate.
How the Brain Does It Differently
Your brain, in contrast, processes sensory information continuously while consuming only about 20 watts — roughly the power of a dim light bulb — because it does not separate computation from memory: neurons store and process information in the same place, eliminating the constant data shuttling that makes von Neumann chips so power-hungry. More fundamentally, your brain does not process everything all the time; most neurons sit silent, firing a brief electrical pulse called a spike only when something meaningful happens — a sound, a shift in light, a pattern worth noting. This principle, known as sparse, event-driven computation, is what makes biological intelligence so extraordinarily efficient at tasks that would overwhelm a conventional chip. Neuromorphic computing takes direct inspiration from this design: rather than transistors switching at a fixed clock rate regardless of whether anything interesting is happening, neuromorphic chips use Spiking Neural Networks (SNNs), artificial neurons that remain dormant until triggered, fire a spike, and return immediately to silence 2. The key consequence is that power consumption scales with activity rather than time — no event, no energy draw.
From Blueprint to Silicon
The gap between the brain’s efficiency and silicon’s is not merely theoretical — it is being closed, unevenly but measurably, by a new generation of hardware that abandons the strict separation of memory and computation. The most promising approach integrates memristive devices — components whose resistance encodes synaptic weight and changes persistently without continuous power — directly alongside CMOS neurons on the same chip; prototypes have already been fabricated using HfO_x and TaO_x-based materials as synaptic nodes, demonstrating that the in-memory computation the brain performs as a matter of biology can be replicated in manufactured silicon 2. Phase-change memory (PCM), another candidate for neuromorphic synapses, has reached a level of commercial maturity that separates it from most emerging memory technologies: PCM products are already on the market, with established scaling roadmaps, making it one of the first neuromorphic-compatible materials to cross from the research lab into the supply chain 2. The energy stakes driving this hardware push are concrete: the von Neumann bottleneck scales badly — conventional exascale supercomputers consume between 20 and 30 megawatts 2, and even at the far smaller scale of an embedded wearable chip, the same architectural inefficiency manifests as a battery drained in hours rather than months; neuromorphic hardware attacks the root cause rather than the symptom, replacing continuous data movement with sparse, event-driven computation that costs energy only when something meaningful happens.
Why This Changes Everything for Wearables
The implications for wearable technology are broad and concrete. A wearable designed for continuous health monitoring — tracking heart rhythm, detecting signs of respiratory distress, or classifying movement patterns — must run uninterrupted all day, every day; with von Neumann chips, that requirement forces a compromise between sensing capability and battery life that no amount of conventional engineering has yet resolved. Neuromorphic chips change that trade-off fundamentally, because their energy consumption is governed not by how long they run but by how often something meaningful occurs in the data they observe. Consider a cardiac patch capable of real-time arrhythmia detection, continuous glucose tracking, or multi-modal fall detection: today these applications demand a constant cloud connection because on-device processing draws too much power, introducing latency, privacy risks, and a hard dependency on network availability. Neuromorphic hardware dissolves that dependency by moving intelligence to the edge — into the device itself, on your body. The market reflects this potential: estimated at $0.2 billion in 2025, the neuromorphic computing sector is projected to reach $22 billion by 2035 2, driven largely by demand from IoT, wearables, and edge AI.
The Road Ahead
Neuromorphic computing is still young, and the gap between its promise and its practical deployment remains real: programming spiking neural networks requires new tools and fundamentally different algorithmic thinking; getting SNNs to match the accuracy of conventional deep learning on complex tasks is an active and unresolved area of research; and the software ecosystem — compilers, simulators, development kits — is maturing, but not yet as deep or stable as the decades of tooling built for traditional chips. These are not trivial obstacles, and they explain why neuromorphic processors remain, for now, specialized components rather than general-purpose replacements. Yet the trajectory is clear — as demand for always-on, body-worn intelligence grows and the physical limits of von Neumann scaling become harder to engineer around. What remains to be seen is whether the software ecosystem can mature quickly enough to meet the moment, before the next generation of wearables runs out of patience with the architecture John von Neumann designed eighty years ago.
This is the first post in SpikeSense, a blog on neuromorphic wearables — the future of always-on sensing.
References
-
von Neumann, J. (1945). First Draft of a Report on the EDVAC. Moore School of Electrical Engineering, University of Pennsylvania. https://archive.org/details/firstdraftofrepo00vonn ↩
-
Schuman, C. D., et al. (2022). Opportunities for neuromorphic computing algorithms and applications. Neuromorphic Computing and Engineering, 2(1). https://doi.org/10.1088/2634-4386/ac4a83 ↩ ↩2 ↩3 ↩4 ↩5 ↩6